The present invention relates to analog to digital converters (ADCs). More particularly, the present invention relates to ADCs that support both wide and narrow frequency bands.
A number of Radio-Frequency (RF) applications, such as digital radar systems, require analog-to-digital converters that will support challenging requirements for bandwidth, resolution, and dynamic range. A typical application may require analog-to-digital conversion for analog signals within one of several different 10 MHz bandwidths at a resolution of 15 signal-to-noise-and-distortion (SINAD) bits and analog-to-digital conversion for analog signals over a 1 GHz bandwidth at a resolution of 9 bits. Each separate bandwidth is considered a separate mode of analog-to-digital conversion. Each mode can be provided by separate analog-to-digital converters, but to reduce power, area, and cost, it is desired that the analog-to-digital converter units be highly integrated.
Analog to digital data conversion involves quantization of the analog input signal. Quantization required for analog to digital conversion may be multi-level quantization as illustrated in FIG. 1A or two-level quantization as illustrated in FIG. 1B. The quantization process is described by the equation
y=Gx+e
G is the slope of the straight line going through the centers of the quantization steps and e is the quantization error or quantization noise. In FIG. 1A, the slope is indicated by the diagonal line 100 and the quantization steps are indicated by stair-step line 101. In the two-level quantizer shown in FIG. 1B, the slope is indicated by the diagonal line 102, and the two quantization levels are shown by the two-state line 103. The error term e can be modeled as random additive noise with a uniform amplitude distribution, which has an impact on the performance of the analog-to-digital converter.
One method for reducing the quantization noise is through oversampling. It is well known that to recover a sampled analog signal, the signal must be sampled at a rate greater than or equal to twice the signal frequency, otherwise known as the Nyquist sampling rate. Oversampling refers to sampling the signal at a rate much greater than twice the signal frequency. FIG. 2A shows the magnitude of quantization noise, in terms of the signal-to-noise (SNR), at a particular frequency of interest f when the analog signal is sampled at the minimum sampling rate of fs. FIG. 2B shows the magnitude of quantization noise at the same frequency of interest when the signal is sampled at a sampling rate equal to 2fs. By comparing the quantization noise in FIG. 2A and FIG. 2B, respectively, one can see that increasing the sampling frequency spreads the quantization noise over a larger bandwidth because the total quantization noise remains the same over the different sampling bandwidths. Thus, increasing the sampling rate relative to twice the signal frequency, or oversampling, reduces the quantization noise in the bandwidth of interest.
A common architecture for analog-to-digital converters that support high frequency quantization rates is a flash architecture as illustrated in FIG. 3. In FIG. 3, 2nxe2x88x921 comparators 110 are used to directly measure an analog signal 113 to a resolution of n bits. The outputs from the multiple comparators simultaneously present 2nxe2x88x921 discrete digital output states, which are then level decoded 111 into a binary form 112. The flash architecture is very fast, and thus has the advantage of easily operating at the quantization rates required to meet Nyquist sampling rate requirements for extremely high frequency analog signals. However, the flash architecture requires many comparators for high bit resolution, with a corresponding increase in power, size, and circuit complexity. For example, a 9-bit flash analog-to-digital converter would require 511 comparators, while a 15-bit flash analog-to-digital converter would require 32767 comparators. Hence, the large number of comparators required for high resolution is a major limitation for a flash analog-to-digital converter.
Resolution of a flash analog-to-digital converter is also limited by its quantization noise performance. The effective resolution or effective number of bits (ENOB) of the analog-to-digital converter is given by:   ENOB  =                    SNR        -                  1.76          ⁢          dB                            6.02        ⁢        dB              .  
If only the effect of quantization noise is considered, the effective number of bits is equivalent to the signal-to-noise and distortion (SINAD) bits. As described above, the quantization noise will the highest and, therefore, the SNR will be the lowest when the ADC is operating at the Nyquist sampling rate. If oversampling is used, the quantization noise will decrease and the SNR will increase, thus providing additional resolution. However, when only over-sampling is used to increase resolution, the sampling frequency must increase by a factor of 22N to obtain an N-bit increase in SINAD resolution. Hence, each doubling of the sampling frequency can only achieve a 0.5 bit increase in SINAD resolution. Thus, a high resolution flash analog-to-digital converter incurs a bandwidth penalty for increased resolution.
A delta-sigma modulator achieves additional SINAD bits with less of a bandwidth penalty by combining over-sampling with a noise-shaping technique. A basic block diagram of a delta-sigma modulator is shown in FIG. 4A. The delta-sigma modulator comprises a summing node 120, an integrator 121 and a quantizer 122 coupled together in succession. A feedback loop 124 couples the Output Y(i) of the quantizer 122 to the summing node 120 through a digital-to-analog converter 123. In operation, an analog input signal enters the summing node 120 where an analog version of the feedback signal Ya(i) is subtracted from it to create a difference signal Xd(t). The difference signal is then input to the integrator 121 that produces an integral signal Xi(t). The quantizer then rounds the integral signal Xi(t) to the nearest quantization level thereby producing a digital signal Yi. The feedback loop 124 forces the average output of the quantizer to track the input signal X(t) and thus provide a digitized version of the analog input signal.
In a delta-sigma modulator, the integrator, which is a low pass filter, acts to push the quantization noise up in frequency. This feature is explained by referencing the discrete time model of the delta-sigma modulator shown in FIG. 4B. A sampled version of an analog signal, X(i), enters the summing node 120 where the feedback signal Ya(i) is subtracted from it to create the sampled difference signal Xd(i). The integrator 121 is implemented with a discrete time integrator comprising a delay element 126 and a feedback element 127. The integrator 121 produces an integral signal XI(i). The quantizer 122 is modeled as a noise source E(i) coupled to summing node 128. Moreover, the digital-to-analog converter 123 can be treated as ideal, and modeled as a unity gain transfer function.
The output of the discrete time delta-sigma modulator can be written as
Y(i)=XI(i)+E(i)
where XI as the output of the discrete time integrator can be written as:
XI(i)=X(ixe2x88x921)xe2x88x92E(ixe2x88x921)
Thus,
Y(i)=X(ixe2x88x921)+(E(i)xe2x88x92E(ixe2x88x921))
In the z-domain, the output is given by
Y(z)=X(z)zxe2x88x921+E(z)(1xe2x88x92zxe2x88x921)
Thus, the transfer function for the input signal, Hx(z) is equal to zxe2x88x921 and the transfer function of the noise source, Hn(z) is equal to (1zxe2x88x921). Since zero frequency is represented in the z domain at z=1, it can readily be seen that as the frequency approaches zero, E(z) is attenuated. Therefore, the integrator in the delta-sigma modulator provides that the delta-sigma modulator acts as a high pass filter for quantization noise, and a lowpass filter for the input signal.
The example above shows a first order delta-sigma modulator, where only a single order integrator is used. It is known in the art that the first order delta-sigma modulator described above provides up to an additional 1.5 SINAD bits of analog-to-digital conversion resolution for every doubling of the sampling frequency. Thus, the over sampling and noise shaping techniques implemented by the delta-sigma modulator can provide more resolution than just the over sampling technique used with a flash converter ADC. Also, additional orders of integration provide additional resolution for the same amount of oversampling.
When an integrator is used in a delta-sigma modulator, the noise shaping that is achieved is simply that of a low pass filter. However, it is known in the art that the integrator in a delta-sigma modulator can be replaced with a bandpass filter. If the integrator is replaced with a bandpass filter, the delta-sigma modulator will also act as a bandpass filter, where only the frequencies of the analog input signal within the passband will be output by the modulator. In addition, the quantization noise is moved up and down in frequency to leave a virtually noise-free region in the passband.
A typical implementation of a delta-sigma modulator uses a one bit quantizer, since a one bit quantizer is essentially just a comparator. Comparators that can operate at high frequencies of 10 GHz or greater are well known in the art. When a single bit quantizer is used in a discrete time version of the delta-sigma modulator, the output of the delta-sigma modulator will be a stream of bits (one and zeros) at the sampling rate used on the analog input signal. To make use of the high frequency bit stream from the modulator, the bit stream is digitally filtered. When an integrator is used in the delta-sigma modulator, the digital filter is usually formed as a digital low-pass filter, which performs two important functions. As discussed above, the output from the delta-sigma modulator still contains high band quantization noise, which is finally suppressed by the low pass digital filter. Additionally, the lowpass filter performs a decimation of the high frequency bit stream to form a multi-bit parallel output code. If delta-sigma modulator is configured to act in a bandpass fashion, the digital filter on the output would be formed as a digital bandpass filter.
Delta-sigma modulators can also be implemented by using a multi-bit quantizer with a single or multiple bit digital-to-analog converter in the feedback path. One such configuration is disclosed by J. C. Candy and G. C. Temes in xe2x80x9cOversampling Methods For Data Conversion,xe2x80x9d IEEE Pacific Rim Conference on Communications, Computers, and Signal Processing, May 9-10, 1991, p. 499, which is incorporated herein by reference. Candy and Temes disclose a delta-sigma modulator where the quantizer is a multi-bit quantizer and the most-significant-bit (MSB) of the quantizer output is fed back to be subtracted from the input signal. The output of the multi-bit quantizer and the MSB are also fed forward for additional digital signal processing. Candy and Temes state that in this delta-sigma modulator configuration, if the multi-bit quantizer uses N bits, a resolution enhancement of an additional Nxe2x88x921 bits can be achieved.
Increasing the order of the integrator used within the delta-sigma modulator and using a multi-bit quantizer with multi-bit feedback also provides additional SINAD bits. J. L. Melanson in U.S. Pat. No. 5,896,101, issued Apr. 20, 1999, discloses a delta-sigma modulator that uses multiple bit feedback into multiple orders of integration to provide better prediction of the in-band quantization error and improved SINAD performance. This invention uses an over-sampling technique where the sampling frequency is 64 to 512 times the overall bandwidth of the delta-sigma modulator. Hence, the frequency coverage of the analog-to-digital converter disclosed by Melanson is limited to a fraction of the overall sampling frequency. Thus, the invention disclosed by Melanson provides narrow frequency band coverage, but is inappropriate for use in wide frequency band applications.
Various techniques can be used to provide a wide frequency band capability for an analog-to-digital converter. As discussed above, the flash architecture inherently provides a wide frequency band analog-to-digital converter. Delta-sigma modulators can also be used to construct wideband analog-to-digital converters. I. A. Galton in U.S. Pat. No. 5,196,852, issued Mar. 23, 1993, discloses an analog-to-digital converter comprising multiple delta-sigma modulators, all operating on the same input signal. The parallel channels can be configured so that the analog-to-digital converter will provide wide band coverage, but each delta-sigma modulator requires a separate quantizer and additional digital filtering to implement the analog-to-digital conversion function. These additional components add size, complexity, and power consumption to the analog-to-digital converter. In addition, the invention disclosed by Galton does not provide the capability to cover multiple frequency bands.
A need remains in the art for an analog-to-digital converter that can provide both wide and narrow frequency band coverage. The analog-to-digital converter must also be highly integrated to provide decreased complexity, size, and power consumption.
An object of the present invention is to provide a method and apparatus for analog-to-digital conversion that can provide both wide and narrow frequency band coverage. An additional object of the present invention is to provide a highly integrated apparatus for such analog-to-digital conversion.
A single quantizer is operated at the Nyquist sampling rate to provide analog-to-digital conversion of signals over a wide frequency range up to one-half of the Nyquist frequency. This quantizer can be either a single-bit or multiple-bit quantizer using analog-to-digital converter architectures known in the art, such as a flash architecture.
Narrow frequency band analog-to-digital conversion is provided by using a delta-sigma modulator circuit to feed a quantizer that provides an analog-to-digital converter output signal and a feedback signal to the delta-sigma modulator. The feedback signal contains one or more of the digital bits output by the quantizer. The delta-sigma modulator can be of any order and can be constructed to provide either lowpass or bandpass characteristics. Selection of the delta-sigma modulator parameters will determine the frequency response of the narrowband analog-to-digital converter. Multiple delta-sigma modulators provide multiple frequency bands of operation.
A single quantizer supports both wide and narrow frequency bands by routing the input to the analog-to-digital converter either directly to the input to the quantizer or to the input of a selected delta-sigma modulator circuit. The output of the selected delta-sigma modulator circuit is then connected to the quantizer. A delta-sigma modulator circuit for a narrowband mode is selected by activating both an input switch and an output switch for the selected delta-sigma modulator circuit while deactivating the switches for all other delta-sigma modulator circuits. The wideband mode is selected by deactivating the switches for all the delta-sigma modulator circuits, while activating a switch that connects the ADC input to the quantizer input.
The delta-sigma modulator circuit may correspond to a continuous-time modulator, where the filters used within the delta-sigma modulator are derived from analog filters. Alternatively, the delta-sigma modulator may be a discrete-time modulator, where the input to the modulator is a sampled version of the analog input signal and the delta-sigma modulator filters are implemented using sampled-data equivalents to the analog filters.